Techniques for HDL Design and FPGA Implementation

Course Title: Techniques for HDL Design and FPGA Implementation

Code: 3ФЕИТ07022А

ECTS points: 6 ECTS

Number of classes per week: 3+0+0+3

Lecturer: Prof. d-r Danijela Efnusheva, PhD; Prof. d-r Tatjana Nikolikj, PhD

Course Goals (acquired competencies): Acquiring knowledge of designing digital electronic components in HDL – Hardware Description Languages. Acquiring knowledge of appropriate software environments for HDL design and simulation. Work with FPGA components.

Course Syllabus: Digital systems design, implementation and application. HDL – Hardware Description Languages: VHDL, Verilog, System C. Using IP-cores for digital systems design. System-on-chip design with HDL. Description of processors in HDL. Description of busses in HDL. Energy-efficient embedded systems design. Design of communication for embedded computer systems.  FPGA architecture. Use of CAD tools dedicated to FPGAs from different vendors: Xilinx, Altera. Design and simulation of digital systems with CAD tools. Programming of FPGA devices. Application of digital systems, implemented in FPGA.

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